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News
Electronic design automation
Sep 14, 2017
Flex Logix Wins TSMC Open Innovation Platform Partner Of The Year Award 2017
Sep 13, 2017
Cadence Introduces the Conformal Smart Logic Equivalence Checker
Sep 13, 2017
Cadence Delivers Design and Analysis Flow Enhancements for TSMC InFO and CoWoS® 3D Packaging Technologies
Sep 13, 2017
Mentor extends solutions for TSMC InFO and CoWoS design flows to help customers continue IC innovations
Sep 12, 2017
Intelligent Symbol Building Tool With Support for FPGAs and Other High Pin Count Devices
Sep 12, 2017
New Cadence Allegro PCB DesignTrue DFM Technology Accelerates New Product Development and Introduction Process
Sep 12, 2017
Synopsys and TSMC Collaborate to Develop DesignWare Foundation IP for Low-Power TSMC 40-nm eFlash Processes
Sep 11, 2017
Cadence Tools and Flows Achieve Production-Ready Certification for TSMC's 12FFC Process
Sep 11, 2017
Cadence Collaborates with TSMC to Advance 7nm FinFET Plus Design Innovation
Sep 11, 2017
Synopsys' IC Compiler II Completes Certification for TSMC's 12-nm Process Technology
Sep 11, 2017
Synopsys IC Compiler II Certified for TSMC's Advanced 7-nm FinFET Plus Node
Sep 11, 2017
Synopsys Successfully Tapes Out Broad IP Portfolio for TSMC 7-nm FinFET Process
Sep 08, 2017
Synopsys to Repatriate $775-$850 Million of International Cash
Sep 05, 2017
Synopsys Announces Release 11.1 of CODE V Optical Design Software
Sep 05, 2017
Samsung SARC Selects Synopsys as Primary Verification Solution for Advanced Mobile Processor Designs
Aug 30, 2017
Synopsys to Present at 2017 Citi Global Technology Conference
Aug 16, 2017
Plethora launches instant online manufacturability analysis tool for machined parts
Aug 07, 2017
Cadence Full-Flow Digital and Signoff and Verification Suite Optimized to Support Arm Cortex-A75 and Cortex-A55 CPUs and Arm Mali-G72 GPU
Aug 02, 2017
Netlist Announces Demonstration Of HybriDIMM(TM), Storage Class Memory Solution At Flash Memory Summit 2017
Jul 26, 2017
MediaTek Standardizes on Synopsys' HAPS-80 Prototyping System
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